{"id":10698,"date":"2015-11-01T00:00:00","date_gmt":"2015-11-01T00:00:00","guid":{"rendered":"https:\/\/engineering.uodiyala.edu.iq\/%d9%86%d8%b4%d8%b1-%d8%a8%d8%ad%d8%ab-%d8%b9%d9%84%d9%85%d9%8a-9\/"},"modified":"2023-03-12T03:51:39","modified_gmt":"2023-03-12T03:51:39","slug":"%d9%86%d8%b4%d8%b1-%d8%a8%d8%ad%d8%ab-%d8%b9%d9%84%d9%85%d9%8a-9","status":"publish","type":"post","link":"https:\/\/engineering.uodiyala.edu.iq\/?p=10698","title":{"rendered":"\u0646\u0634\u0631 \u0628\u062d\u062b \u0639\u0644\u0645\u064a"},"content":{"rendered":"
\n

\n

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\n – \u0643\u0644\u064a\u0629 \u0627\u0644\u0647\u0646\u062f\u0633\u0629 – \u062c\u0627\u0645\u0639\u0629 \u062f\u064a\u0627\u0644\u0649 \u0627\u0644\u0645\u062f\u0631\u0633 \u0627\u0644\u0645\u0633\u0627\u0639\u062f
\n \u0623\u062d\u0645\u062f \u062e\u0636\u064a\u0631 \u062c\u0645\u064a\u0644 \u0628\u062d\u062b\u0627\u064b \u0639\u0644\u0645\u064a\u0627\u064b \u0628\u0639\u0646\u0648\u0627\u0646 <\/span><\/strong><\/p>\n<\/p>\n

(<\/span><\/strong>\u062e\u0648\u0627\u0631\u0632\u0645\u064a\u0629 \u062d\u062f\u064a\u062b\u0629  \u0641\u064a  \u0642\u0635\u0631 \u0627\u0644\u062e\u0637 \u0627\u0644\u0645\u0641\u062a\u0648\u062d  \u0644\u0627\u0643\u062a\u0634\u0627\u0641 \u0627\u0644\u0639\u0637\u0644 \u0641\u064a  \u0627\u0644\u062f\u0648\u0627\u0626\u0631 \u0627\u0644\u0645\u0646\u0637\u0642\u064a\u0629) .<\/strong>
\n\u0641\u064a  \u0627\u0644\u0645\u062c\u0644\u0629 \u0627\u0644\u0639\u0627\u0644\u0645\u064a\u0629 <\/strong><\/span><\/p>\n<\/p>\n

((<\/span>International Journal of Engineering Research and General Science<\/span><\/strong>))
\n \u0641\u064a \u062f\u0648\u0644\u0629 \u0627\u0644\u0646\u064a\u0628\u0627\u0644<\/span><\/p>\n<\/p>\n

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 <\/span> <\/span>\u0623\u0645\u0627 \u0627\u0644\u0639\u0646\u0648\u0627\u0646 \u0648 \u0627\u0644\u062e\u0644\u0627\u0635\u0629 \u0628\u0627\u0644\u0644\u063a\u0629 \u0627\u0644\u0627\u0646\u0643\u0644\u064a\u0632\u064a\u0629 :<\/span><\/p>\n

 <\/span><\/p>\n<\/p>\n

 <\/span>A NEW SINGLE STUCK FAULT DETECTION ALGORITHM FOR DIGITAL CIRCUITS <\/span><\/strong><\/p>\n<\/p>\n

 <\/span><\/strong><\/p>\n<\/p>\n

Abstract <\/span><\/strong><\/p>\n<\/p>\n

 <\/span><\/em><\/strong> Single stuck line is a deficiency model utilized as a part of computerized circuits. It is used for post assembling testing. The model expects one line or hub in the computerized circuit is stuck at logical high or logical low. When a line is stuck it is called a fault. Fault detection in digital circuits is very important to get accurate results. When redundancy is introduced into digital circuits to achieve fault tolerance, the necessary overhead must be weighed against the improvement in reliability. In order to achieve a new design to simulate fault for a digital combinational circuit that is made up of ten gates and three inputs with one output. Results for single stuck at all faults are presented with details and the code written by c language.
\n\u0648\u064a\u0645\u0643\u0646 \u062a\u062d\u0645\u064a\u0644 \u0627\u0644\u0628\u062d\u062b \u0645\u0646 \u0647\u0646\u0627<\/a><\/span><\/p>\n<\/p>\n


\n<\/span><\/p>\n

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\nhttp:\/\/www.engineering.uodiyala.edu.iq\/
\n<\/span><\/div>\n<\/p>\n

 <\/span><\/p>\n<\/p>\n

 <\/span><\/p>\n<\/p>\n

 <\/span><\/p>\n<\/p>\n<\/div>\n","protected":false},"excerpt":{"rendered":"

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